1. Field of the Invention
The present invention relates generally to computer systems.
2. Description of the Background Art
A computer system may include one or more central processing units and one or more memory modules. A memory module comprises one or more memory integrated circuits (“chips”). A memory chip may comprise volatile memory (e.g., dynamic random access memory (DRAM)), non-volatile memory (e.g., flash memory), or both. Volatile memory loses its contents when the computer system's power is interrupted. In contrast, non-volatile memory keeps its contents even in the absence of system power. Generally speaking, volatile memory is faster than non-volatile memory and is thus preferred as main memory for processes of the operating system, application programs, etc. Currently-available computer systems typically employ dual in-line memory modules (DIMMs), which comprise only volatile memory, for main memory. A registered DIMM (RDIMM) has a register between the DRAM modules and the memory controller, but is otherwise the same as a DIMM and has only volatile memory. Unlike a DIMM or RDIMM, a non-volatile DIMM (NVDIMM) comprises both volatile memory to provide fast access speeds and non-volatile memory as insurance against power failure.
A central processing unit (CPU) may have an internal cache memory for caching the contents of memory locations. Cached data may be written to corresponding memory locations (i.e., memory locations being cached) in accordance with a write-through cache strategy or write-back cache strategy. With write-through, data that are written to the cache memory are also written to the corresponding memory location at the same time. This way, the cache memory and the corresponding memory locations are always in synchronization. With write-back, data that are written to the cache memory are written to the corresponding memory location only at intervals or under certain conditions. Because an NVDIMM is meant to store critical data, NVDIMM memory locations are traditionally cached in accordance with the write-through cache strategy to ensure that the NVDIMM always has the most current data.